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ATMEGA169PA-MCUR View Datasheet(PDF) - Atmel Corporation

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ATMEGA169PA-MCUR Datasheet PDF : 387 Pages
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ATmega169PA
7. AVR Memories
This section describes the different memories in the ATmega169PA. The AVR architecture has
two main memory spaces, the Data Memory and the Program Memory space. In addition, the
ATmega169PA features an EEPROM Memory for data storage. All three memory spaces are
linear and regular.
7.1 In-System Reprogrammable Flash Program Memory
The ATmega169PA contains 16K bytes On-chip In-System Reprogrammable Flash memory for
program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as 8K
x 16. For software security, the Flash Program memory space is divided into two sections, Boot
Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega169PA
Program Counter (PC) is 13 bits wide, thus addressing the 8K program memory locations. The
operation of Boot Program section and associated Boot Lock bits for software protection are
described in detail in ”Boot Loader Support – Read-While-Write Self-Programming” on page
278. ”Memory Programming” on page 294 contains a detailed description on Flash data serial
downloading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in ”Instruction Execution Tim-
ing” on page 16.
Figure 7-1. Program Memory Map
Program Memory
0x0000
Application Flash Section
8171B–AVR–03/10
Boot Flash Section
0x1FFF
19

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