PDM4M4050 View Datasheet(PDF) - Paradigm Technology
Part Name
Description
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PDM4M4050 Datasheet PDF : 10 Pages
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PDM4M4050
256K x 32 BiCMOS/CMOS
1 Static RAM Module
Features
n High-density 8 megabit Static RAM module
n Low profile 64-pin ZIP, 64 -pin SIMM (Single In-
line Memory Module) or Angled SIMM.
n Ultra fast access time: 10 ns (max.)
n Surface mounted plastic components on an epoxy
laminate (FR-4) substrate
n Single 5V (±10%) power supply
n Multiple VSS pins and decoupling capacitors for
maximum noise immunity
n Inputs/outputs directly TTL-compatible
Description
The PDM4M4050 is a 256K x 32 static RAM module
constructed on an epoxy laminate (FR-4) substrate
using eight 256K x 4 static RAMs in plastic SOJ pack-
ages. Availability of four chips select lines (one for
each group of two RAMs) provides byte access.
Extremely fast speeds can be achieved due to the use
of 1 megabit static RAMs fabricated in Paradigm’s
high-performance, high-reliability technology. The
PDM4M4050 is available with access time as fast as
10 ns with minimal power consumption.
The PDM4M4050 is packaged in a 64-pin FR-4 ZIP
2 (Zig-zag In-line vertical Package) or a 64-pin SIMM
(Single In-line Memory Module). The Angled SIMM
configuration allows 64 pins to be placed on a pack-
age 3.50” long and 0.35” wide and 0.68” high. The
SIMM configuration also allows use of edge mounted
sockets to secure the module.
3
All inputs and outputs of the PDM4M4050 are TTL-
compatible and operate from a single 5V supply. Full
4 asynchronous circuitry requires no clocks or refresh
for operation and provides equal access and cycle
times for ease of use.
Two identification pins (PD0 and PD1) are provided
5 for applications in which different density versions of
the module are used. In this way, the target system
can read the respective levels of PD0 and PD1 to
determine a 256K depth.
6
7
8
Functional Block Diagram
9
CS1 CS2 CS3 CS4
18
ADDRESS
WE
OE
8
256K x 32
RAM
8
8
8
I/O31-I/O0
2
PD
10
11
12
Rev 2.2 - 7/17/97
8-45
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