AD73460(Rev0) View Datasheet(PDF) - Analog Devices

Part Name

Description

View to exact match

AD73460
(Rev.:Rev0)

Six-Input Channel Analog Front End

Analog Devices 

AD73460

Figure 24 details the dc-coupled input circuits for single-ended

operation respectively.

100⍀

VIN

0.047␮F

VINPx

VINNx

REFOUT

0.1␮F

REFCAP

VOLTAGE

REFERENCE

Figure 24. Example Circuit for Single-Ended Input

(DC Coupling)

Digital Interface

As there are a number of variations of sample rate and clock

speeds that can be used with the AD73460 in a particular appli-

cation, it is important to select the best combination to achieve

the desired performance. High-speed serial clocks will read the

data from the AD73460 in a shorter time, giving more time for

processing at the expense of injecting some digital noise into the

circuit. Digital noise can also be reduced by connecting resistors

(typ <50 Ω) in series with the digital input and output lines.

The noise can be minimized by good grounding and layout.

Typically the best performance is achieved by selecting the

slowest sample rate and SCLK frequency for the required appli-

cation as this will produce the least amount of digital noise.

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

119-Ball Plastic Ball Grid Array (PBGA)

(B-119)

0.089 (2.27)

0.073 (1.85)

0.559 (14.20)

0.543 (13.80)

0.300 (7.62) BSC

BOTTOM

VIEW

7654321

A1

TOP VIEW

0.866 (22.00)

0.858 (21.80)

0.050

(1.27)

BSC

0.033

(0.84)

A

B

C

D

E

F

G

H 0.800

J (20.32)

K BSC

L

M

N

P

R

T

U

REF

0.050 (1.27)

0.126 (3.19) BSC

REF

0.037 (0.95)

DETAIL A

0.028 (0.70)

DETAIL A

0.033 (0.85)

0.020 (0.50)

SEATING

PLANE

0.035 (0.90)

0.024 (0.60)

BALL DIAMETER

0.022 (0.56)

REF

–32–

REV. 0

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