AD5426 View Datasheet(PDF) - Analog Devices
Part Name
Description
View to exact match
AD5426 Datasheet PDF : 24 Pages
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AD5426/AD5432/AD5443
2.0
1.5
1.0
MAX INL
0.5
MAX DNL
0
TA = 25؇C
VREF = 0V
VDD = 3V
AD5443
–0.5
–1.0
MIN INL
MIN DNL
–1.5
–2.0
0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
VBIAS (V)
TPC 10. Linearity vs. VBIAS
Voltage Applied to IOUT2
0.5
0.4
0.3
0.2
GAIN ERROR
0.1
0
–0.1
OFFSET ERROR
–0.2
–0.3
–0.4
–0.5
0
TA = 25؇C
VREF = 2.5V
VDD = 3V AND 5V
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VBIAS (V)
TPC 13. Gain and Offset Errors
vs. VBIAS Voltage Applied to IOUT2
0.7
0.6
0.5
VDD = 5V
0.4
0.3
TA = 25؇C
0.2
0.1
VDD = 3V
0
0
1
2
3
4
5
INPUT VOLTAGE (V)
TPC 16. Supply Current vs.
Logic Input Voltage, SYNC
(SCLK, DATA = 0)
4
TA = 25؇C
3 VREF = 2.5V
VDD = 3V
2 AD5443
1
MAX DNL
MAX INL
0
–1
MIN DNL
–2
–3
–4
MIN INL
–5
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
VBIAS (V)
TPC 11. Linearity vs. VBIAS
Voltage Applied to IOUT2
0.5
0.4
TA = 25؇C
VREF = 0V
0.3 VDD = 3V AND 5V
0.2
GAIN ERROR
0.1
0
–0.1
OFFSET ERROR
–0.2
–0.3
–0.4
–0.5
0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
VBIAS (V)
TPC 12. Gain and Offset Errors vs.
VBIAS Voltage Applied to IOUT2
3
MAX INL
2
1
MAX DNL
0
TA = 25؇C
VREF = 0V
VDD = 5V
AD5443
–1
MIN INL
–2
MIN DNL
–3
0.5
1.0
1.5
2.0
2.5
VBIAS (V)
TPC 14. Linearity vs. VBIAS
Voltage Applied to IOUT2
4
TA = 25؇C
3 VREF = 2.5V
VDD = 5V
2 AD5443
MAX DNL
1
0
MAX INL
–1
MIN DNL
–2
–3
–4
–5
0.5
MIN INL
1.0
1.5
2.0
VBIAS (V)
TPC 15. Linearity vs. VBIAS
Voltage Applied to IOUT2
1.6
1.4
1.2
IOUT1 VDD 5V
1.0
0.8
0.6
0.4
IOUT1 VDD 3V
0.2
0
–40 –20 0 20 40 60 80 100 120
TEMPERATURE (؇C)
TPC 17. IOUT1 Leakage Current
vs. Temperature
0.50
0.45
0.40
TA = 25؇C
VDD = 5V
0.35
ALL 0s
0.30
0.25
ALL 1s
0.20
0.15
0.10
ALL 1s
VDD = 3V
ALL 0s
0.05
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (؇C)
TPC 18. Supply Current vs.
Temperature
–8–
REV. 0
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