A43L0632 View Datasheet(PDF) - AMIC Technology

Part Name

Description

View to exact match

A43L0632

512K X 32 Bit X 2 Banks Synchronous DRAM

AMIC Technology 

A43L0632

Operating AC Parameter

(AC operating conditions unless otherwise noted)

Symbol

Parameter

tRRD(min)

tRCD(min)

Row active to row active delay

RAS to CAS delay

Version

-6

-7

12

14

18

20

Unit

Note

ns

1

ns

1

tRP(min)

tRAS(min)

tRAS(max)

tRC(min)

Row precharge time

Row active time

Row cycle time

18

20

ns

1

42

49

ns

1

100

100

μs

60

68

ns

1

tCDL(min)

tRDL(min)

tBDL(min)

tCCD(min)

Last data in new col. Address delay

Last data in row precharge

Last data in to burst stop

Col. Address to col. Address delay

1

CLK

2

2

CLK

2

1

CLK

2

1

CLK

Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and

then rounding off to the next higher integer.

2. Minimum delay is required to complete write.

PRELIMINARY (February, 2007, Version 0.1)

7

AMIC Technology, Corp.

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