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S83C198 View Datasheet(PDF) - Intel

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S83C198 Datasheet PDF : 19 Pages
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8XC198
FUNCTIONAL DEVIATIONS
Devices marked with an ‘‘E’’ ‘‘F’’ or ‘‘G’’ have the
following errata
1 HIGH SPEED INPUTS
The High Speed Input (HSI) has three deviations
from the specifications
NOTE
‘‘Events’’ are defined as one or more pin tran-
sitions ‘‘Entries’’ are defined as the recording of
one or more events
A The resolution is nine states instead of eight
states Events occurring on the same pin more
frequently than once every nine states may be
lost
B A mismatch between the nine state HSI resolu-
tion and the eight state hardware timer causes
one time-tag value to be skipped every nine timer
counts Events may receive a time-tag one count
later than expected
C If the FIFO and Holding Register are empty the
first event will transfer into the Holding Register
leaving the FIFO empty again The next event
that occurs will be the first event loaded into the
empty FIFO If the first two events into an empty
FIFO (not counting the Holding Register) occur
coincident with each other both are recorded as
one entry with one time-tag If the second event
occurs within 9 states after the first the events
will be entered separately with time-tags at least
one count apart If the second event enters the
FIFO coincident with the ‘‘skipped’’ time-tag situ-
ation (see B above) the time-tags will be at least
two counts apart
2 CMPL with R0
Using CMPL with register 0 can set incorrect flags
Don’t use register 0 with the compare long instruc-
tion Use another long word register and set it equal
to zero See Techbit MC0692
REVISION HISTORY
This data sheet (272034-003) is valid for devices
marked with an ‘‘E’’ ‘‘F’’ or ‘‘G’’ at the end of the
top side tracking number Data sheets are changed
as new device information becomes available Verify
with your local Intel sales office that you have the
latest version before finalizing a design or ordering
devices
The following differences exist between this data
sheet and the previous version (-002)
1 This data sheet added the ROMless and ROM
devices 80C198 and 83C198 respectively
2 The description of the A D converter prescalar
bit was improved
19

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