datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

S1M8662A View Datasheet(PDF) - Samsung

Part Name
Description
View to exact match
S1M8662A Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
S1M8662A (Preliminary)
RX IF/BBA WITH GPS
PIN DESCRIPTION
Pin No
1
2
3
Symbol
VDDD
VDDA
RAGC_CONT
4
GRX_IF1
5
GRX_IF2
6
CRX_IF1
7
CRX_IF2
8
VDDA
9
TCXO_out
10
VDDA
11
VDDA
12
Q_OFS
13
I_OFS
14
RXVCO_T1
15
RXVCO_T2
16
VDDA
17 RXVCO_OUT1
18 RXVCO_OUT2
19
SPI_STB
20
SPI_DATA
21
SPI_CLK
22
TCXO_in
23
CHIPx8
I/O
P
P
AI
AI
AI
P
DO
P
P
AI
AI
P
AO
DI
BI
DI
AI/DI
DI
Description
Power for the digital logic.
Power input terminal for the analog circuit.
AGC gain control input. The input voltage is allowed up to VDDA.
It remains at High impedance during SLEEP.
GPS IF input terminals, which have an input impedance of about
865W; generally, the GPS IF SAW filter is connected to them. When
these terminals are not used, they remain at High impedance.
CDMA IF input terminals, which have an input impedance of about
865; generally, the CDMA IF SAW filter is connected to them. When
these terminals are not used, they remain at High impedance.
Power input terminal for the analog circuit.
TCXO Clock output. division ratio : 1
Power input terminal for the analog circuit.
Power input terminal for the analog circuit.
Control DC input for removing the DC offset generated in the
S1M8662A and system during CDMA and GPS Mode. The control DC
is generated in the modem in PDM form, passes through the R-C filter
and is converted to DC, which is sent to this input terminal.
Very sensitive terminal, which is connected to the oscillation L-C
resonance circuit.
Their impedance are about 2k
Power input terminal for the analog circuit.
Output for the PLL, able to output about -12dBm.
When this is not used, it remains at high impedance.
3-Line serial control. Strobe input port.
If this pin is opened, it remains at Low.
3-Line serial control. DATA input/output port.
If this pin is opened, it remains at Low.
3-Line serial control. CLOCK input/output port.
If this pin is opened, it remains at Low.
Reference frequency input terminal connected to the VCTCXO output.
When this pin stops, only DC bias is delivered to maintain the DC
charge value of the capacitor connected externally
CHIPx8 Clock input port. CDMA/GPS ADC sampling clock from the
MSM.
4

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]