MAX1510 View Datasheet(PDF) - Maxim Integrated

Part Name

Description

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MAX1510

Low-Voltage DDR Linear Regulators

Maxim Integrated 

MAX1510/MAX17510

Low-Voltage DDR Linear Regulators

SHDN

200µs

CURRENT LIMIT

POWER-GOOD

WINDOW

OUTPUT OVERLOAD

CONDITION

OUT

PGOOD

2ms STARTUP

DELAY

10µs

PROPAGATION

DELAY

10µs

PROPAGATION

DELAY

Figure 3. MAX1510/MAX17510 PGOOD and Soft-Start Waveforms

Power-Good (PGOOD)

The MAX1510/MAX17510 provide an open-drain PGOOD

output that goes high 2ms (typ) after the output initially

reaches regulation during startup as shown in Figure 3.

PGOOD transitions low 10μs after the output goes out of

regulation by ±150mV, or when the device enters shut-

down. Connect a pullup resistor from PGOOD to VCC

for a logic-level output. Use a 100kΩ resistor to minimize

current consumption.

Applications Information

Dynamic Output-Voltage Transitions

By changing the voltage at REFIN, the devices can be

used in applications that require dynamic output-voltage

changes between two set points (graphics processors).

Figure 4 shows a dynamically adjustable resistive volt-

age-divider network at REFIN. Using an external signal

MOSFET, a resistor can be switched in and out of the

REFIN resistordivider, changing the voltage at REFIN.

The two output voltages are determined by the following

equations:

V OUT(LOW

)

=

VREF

 R2 





R1

+

R2





V OUT(HIGH)

=

VREF

 (R2 + R3) 

R1 + (R2 + R3)

REFERENCE

VOLTAGE

(VREF)

R1

CREFIN

R2

MAX1510

MAX17510

REFIN

VOUT(LOW)

VOUT(HIGH)

R3

R2

VOUT(LOW) =VREF R1 + R2

VOUT(HIGH)

=VREF

(R2 + R3)

R1 + (R2 + R3)

Figure 4. Dynamic Output-Voltage Change

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