NT35510 View Datasheet(PDF) - Novatek Microelectronics
Part Name
Description
View to exact match
NT35510 Datasheet PDF : 211 Pages
| |||
PRELIMINARY
NT35510
4.10 Test Pins
Symbol
PADA1
PADA2
PADA3
PADA4
PADB1
PADB2
PADB3
PADB4
CONTACT1A,
CONTACT1B,
CONTACT2A,
CONTACT2B
AVSS_AVDD
AVEE_AVSS
VCL_VDDB
VCL_AVSS
VGMN_VGMP
VGSN_VGSP
KBBC
TEST0~7
OSC_TEST
VDDI_OPT1~2
VSSI_OPT1
VSSIDUM0~106
I/O
Description
- These test pins for chip attachment detection.
PADA1 to PADA4 are output pins and PADB1 to PADB4 are input pins.
- For normal operation:
I/O Connect PADA1 and PADB1 together by ITO trace.
Connect PADA2 and PADB2 together by ITO trace.
Connect PADA3 and PADB3 together by ITO trace.
Connect PADA4 and PADB4 together by ITO trace.
I/O
- Test pin, for test bonding quality, IC internal will connect
CONTACT1A with CONTACT1B, CONTACT2A with CONTACT2B
I Test pin, must be connected to AVSS
I Test pin, must be connected to AVEE
I Test pin, must be connected to VCL
I Test pin, must be connected to VCL
I Test pin, must be connected to VGMN
I Test pin, must be connected to VGSN
O Test pin, not accessible to user. Must be left open.
I/O Test pin, not accessible to user. Must be left open.
I/O Test pin, not accessible to user, Must left open
O
Use them to fix the electrical potentials of unused interface pins and fixed pins.
When not in use, leave it open.
O
Use them to fix the electrical potentials of unused interface pins and fixed pins.
When not in use, leave it open.
O
-These pins are dummy with VSSI potential (not have any function inside).
-Signal traces can’t pass through on glass under these pads.
11/8/2010
22
Version 0.00
With respect to the information represented in this document, Novatek makes no warranty, expressed or implied, including the warranties of merchantability,
fitness for a particular purpose, non-infringement, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any such
information.
Share Link: 