AD1984 View Datasheet(PDF) - Analog Devices
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AD1984 Datasheet PDF : 20 Pages
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AD1984
DIGITAL MICROPHONE INTERFACE TIMING SPECIFICATIONS
The digital microphone interface can support one, two, or four
digital microphones using two or three codec pins. Both uniplex
(one mic per data pin) and multiplex (two mics sharing the
same data pin) are supported. These configurations are shown
in Figure 3, Figure 4, Figure 6, and Figure 7. The interface can
generate a microphone clock at 1.5 MHz, 2.0 MHz, or 3.0 MHz
to suit quality and power requirements.
Table 4. Digital Microphone Timing Parameters
Parameter
Timing Requirements
t0
DM_CLK (1.5 MHz) Period
Duty Cycle
t0
DM_CLK (2.0 MHz) Period
Duty Cycle
t0
DM_CLK (3.0 MHz) Period
Duty Cycle
t1
DM_CLK Rise Time
t2
DM_CLK Fall Time
t3
DM_CLK Edge to Data Valid
t4
Data Setup to DM_CLK Edge
t5
Data Hold from DM_CLK Edge
t6
DM_CLK Edge to Data Hi-Z
Min
Typ
Max
Unit
667
ns
60/40
%
500
ns
50/50
%
333
ns
50/50
%
5
ns
5
ns
40
ns
100
ns
5
ns
7
ns
MIC 1
OFF -CHIP
ON CHIP
DM_1/2
DQ
>
DQ
>
DM_3/4
DQ
>
DQ
>
GAM
LEFT
NID:05
DIGITAL F ILTER
MUX
GAM
RIGHT
GAM
GAM
NID:06
D IGITAL FILTER
LEFT
RIGHT
GAM = GAIN, ATTENUATE, MUTE
DM_CLK
SWAP L/R
DM-CLK
GENERATOR
Figure 3. Uniplex Digital Microphone, Mono Interface
Rev. 0 | Page 12 of 20 | January 2007
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