MB88347-P View Datasheet(PDF) - Fujitsu
Part Name
Description
View to exact match
MB88347-P Datasheet PDF : 20 Pages
| |||
MB88347
s PIN DESCRIPTION
PIN ASSIGNMENT and Table 1 show the pin assignment and pin description of the MB88347.
Table 1 Pin Description
Symbol Pin No.
Type
Name & Function
Power Supply
VCC
9
—
+5 V DC power supply pin for the digital block (MCU interface) and oper-
ational amplifier output buffers.
GND
16
—
Ground pin for the digital block (MCU interface) and operational ampli-
fier output buffers.
VDD
8
—
DC power supply pin for the analog block (D/A converter) except opera-
tional amplifier output buffers.
VSS
1
—
Ground pin for the analog block (D/A converter) except operational
amplifier output buffers.
Control Input
CLK
13
I
Shift clock input to the internal 12-bit shift register: At the rising edge of
CLK data on the DI pin is shifted into the LSB of the shift register and
contents of the shift register are shifted right (to the MSB).
LD
12
I
Load strobe input for a 12-bit address/data : A high level on the LD pin
latches a 4-bit address (upper 4 bits: D11 to D8) of the internal 12-bit
shift register into the internal address decoder, and writes 8-bit data
(lower 8 bits: D7 to D0) of the shift register into an internal data latch
selected by the latched address.
Data Input/Output
DI
14
I
Serial address/data input to the internal 12-bit shift register: The
address/data format is that upper 4 bits (D11 to D8) indicate an address
and lower 8 bits (D7 to D0) indicate data. The D11 (MSB) is the first-in
bit and D0 (LSB) is the last-in bit.
DO
11
O
Serial address/data output from the internal 12-bit shift register: This is
an output pin of the MSB bit data of the 12-bit shift register. This pin
allows a cascade connection of the device.
DAC Output
AO1
15
AO2
2
AO3
3
AO4
4
AO5
5
AO6
6
AO7
7
AO8
10
O
8-bit resolution D/A converter outputs : 8 channels (AO1 to AO8)
Each output channel has an operational amplifier output buffer for ana-
log output data.
4
Share Link: 