HD74ACT164 View Datasheet(PDF) - Hitachi -> Renesas Electronics
Part Name
Description
View to exact match
HD74ACT164 Datasheet PDF : 10 Pages
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HD74AC164/HD74ACT164
Logic Symbol
A
B
CP
MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Pin Names
A, B
CP
MR
Q0 to Q7
Data Inputs
Clock Pulse Input (Active Rising Edge)
Master Reset Input (Active Low)
Outputs
Functional Description
The HD74AC164/HD74ACT164 is an edge-triggered 8-bit shift register with serial data entry and an
output from each of the eight stages. Data is entered serially through one of two inputs (A or B); either of
these inputs can be used as an active High Enable for data entry through the other inputs. An unused input
must be tied High.
Each Low-to-High transition on the Clock (CP) input shifts data one place to the right and enters into Q0
the logical AND of the two data inputs (A•B) that existed before the rising clock edge. A Low level on the
Master Reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all Q
outputs Low.
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