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SUD50P04-15 Datasheet PDF - Vishay Semiconductors

Part Name
Description
MFG CO.
SUD50P04-15
Vishay
Vishay Semiconductors Vishay
Other PDF
  2000  
PDF
SUD50P04-15 Datasheet PDF : SUD50P04-15 pdf     
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DESCRIPTION
The attached spice model describes the typical electrical characteristics of the p-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0 to 10V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.

CHARACTERISTICS
• P-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery
   Characteristics

 

Part Name
Description
PDF
MFG CO.
P-Channel 40-V (D-S), 175°C MOSFET ( Rev : 2004 )
Vishay Semiconductors
P-Channel 40 V (D-S), 175 °C MOSFET
Vishay Semiconductors
P-Channel 40 V (D-S) 175 °C MOSFET
Vishay Semiconductors
P-Channel 40 V (D-S) 175 °C MOSFET
Vishay Semiconductors
P-Channel 40-V (D-S), 175 °C MOSFET ( Rev : 2007 )
Vishay Semiconductors
P-Channel 40-V (D-S), 175 °C MOSFET
Vishay Semiconductors
P-Channel 40-V (D-S) 175°C MOSFET ( Rev : 2007 )
Vishay Semiconductors
P-Channel 40-V (D-S) 175 °C MOSFET
Vishay Semiconductors
P-Channel 40-V (D-S) 175°C MOSFET ( Rev : 2000 )
Vishay Semiconductors
P-Channel 40-V (D-S) 175°C MOSFET ( Rev : 2004 )
Vishay Semiconductors

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