KP1100CK2 Datasheet PDF - JSC ALFA.

DESCRIPTION
The 1100CК2, К1100СК2, КР1100СК2 are monolithic sample-and-hold (SHA) circuits, controlled by signal LOGIC, stores the instantaneous values of the input signal and for a certain time maintain a constant DC voltage at the output with a high accuracy.
The wide bandwidth allows the 1100CК2 to be included inside the feedback loop of 1 MHz op amps without having stability problems. Input impedance of 1010Ω allows high source impedances to be used without degrading accuracy.

FEATURES
• Supply voltages ±15V (group B), ±12В (group А)
• Less than 7 μs sampling time with an error of 0.1%
   at CH = 1000 pF
• Less than 180 ns aperture delay
• Range of input voltages ± 10V (group B), ± 5V (group B)
• External hold capacitor
• Output short-circuit protection
• Compatibility with control input with TTL / CMOS logic

APPLICATIONS
• Ramp generators with variable reset level
• Integrators with programmable reset level
• Synchronous correlators
• 2-Channel switches
• DC and AC zeroing
• Staircase generators