Digit Output Timing (for 16-digit display, at a duty of 15/16)
T = 8/fOSC
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
AD1, 2
SEG1-35
Frame cycle t1 = 1024T (t1= 4.096 ms when fosc = 2.0 MHz)
Display timing t2 = 60T (t2 = 240 s when fosc = 2.0 MHz)
Blank timing t3 = 4T
(t3 = 16 s when fosc = 2.0 MHz)
FEDL9208A-02
ML9208A-xx
VDD
VFL
VDD
VFL
11/35