ALC5624
Datasheet
List of Figures
FIGURE 1. BLOCK DIAGRAM .......................................................................................................................................................4
FIGURE 2. AUDIO MIXER PATH ...................................................................................................................................................5
FIGURE 3. PIN ASSIGNMENTS ......................................................................................................................................................6
FIGURE 4. PCM MONO DATA MODE A FORMAT (BCLK_POLARITY=0) ...................................................................................12
FIGURE 5. PCM MONO DATA MODE A FORMAT (BCLK_POLARITY=1) ...................................................................................12
FIGURE 6. PCM MONO DATA MODE B FORMAT (BCLK_POLARITY=0) ...................................................................................13
FIGURE 7. PCM STEREO DATA MODE A FORMAT (BCLK_POLARITY=0)...................................................................................13
FIGURE 8. PCM STEREO DATA MODE B FORMAT (BCLK_POLARITY=0)...................................................................................13
FIGURE 9. I2S DATA FORMAT (BCLK_POLARITY=0) ..................................................................................................................14
FIGURE 10. LEFT-JUSTIFIED DATA FORMAT (BCLK_POLARITY=0) .............................................................................................14
FIGURE 11. RIGHT-JUSTIFIED DATA FORMAT (BCLK_POLARITY=0) ...........................................................................................14
FIGURE 12. AUTO VOLUME CONTROL BLOCK DIAGRAM............................................................................................................20
FIGURE 13. DATA TRANSFER OVER I2C CONTROL INTERFACE ...................................................................................................22
FIGURE 14. GPIO IMPLEMENTATION ..........................................................................................................................................24
FIGURE 15. POWER CONTROL TO MIC INPUT .............................................................................................................................36
FIGURE 16. GPIO AND IRQ LOGIC .............................................................................................................................................44
FIGURE 17.
FIGURE 18.
FIGURE 19.
FIGURE 20.
JACK-INSERT-DETECT PULL UP RESISTOR IMPLEMENTED VIA AN EXTERNAL CIRCUIT ...........................................46
I2C CONTROL INTERFACE.........................................................................................................................................63
TIMING OF I2S/PCM MASTER MODE........................................................................................................................64
I2S/PCM SLAVE MODE TIMING ...............................................................................................................................65
Hand-Held Multimedia I2S Audio Codec
viii
Track ID: JATR-1076-21 Rev. 1.3