ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C, VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
parameter
Symbol
Min
Typ
Max
Unit
ELECTRICAL CHARACTERISTICS OF THE OUTPUT STAGE (HS0 AND HS1) (CONTINUED)
Current Sensing Ratio(14)
CSNS_ratio bit = 0 (high-current mode)
CSNS_ratio bit = 1 (low-current mode)
Minimum measurable load current with compensated error(15) < 35%
CSNS leakage current in OFF state (CSNSx_en = 0, CSNS_ratio
bit_x = 0)
CSR0
CSR1
I_LOAD_MIN
ICSR_LEAK
–
–
1/5000
–
–
1/1666.6
–
–
–
175
mA
-4.0
–
+4.0
µA
Systematic offset error (see Current Sense Errors)
I_LOAD_ERR_SYS
–
15
–
mA
Random offset error
I_LOAD_ERR_RAND
-360
–
360
mA
CSNS pin current sourcing capability, absolute upper limit
ICSNS,MAX
5.15
–
ESR0 Output Current Sensing Error (%, uncompensated(16)) at output
Current level (Sense ratio CSR0 selected):
ESR0_ERR
TJ=-40 C
9.0 A
-13
–
–
mA
%
13
4.5 A
-12
–
12
2.25 A
1.13 A
TJ=125C
9.0 A
4.5 A
2.25 A
1.13 A
TJ=25 to 125C
9.0 A
4.5 A
2.25 A
1.13 A
-17
–
17
-31
–
31
-10
–
10
-9.0
–
9.0
-12
–
12
-19
–
19
-10
–
10
-9.0
–
9.0
-12
–
12
-22
–
22
Notes:
14. Current Sense Ratio CSRx = ICSNS / (IHS[x] +I_LOAD_ERR_SYS)
15. See note (16), but with ICSNS_MEAS obtained after compensation of I_LOAD_ERR_RAND (see Activation and Use of Offset Compensation).
Further accuracy improvements can be obtained by performing a 1 or 2 point calibration
16. ESRx_ERR=(ICSNS_MEAS / ICSNS_MODEL) -1, with ICSNS_MODEL = (I(HS[x])+ I_LOAD_ERR_SYS) * CSRx , (I_LOAD_ERR_SYS defined above, see
section Current Sense Error Model). With this model, load current becomes: I(HS[x]) = ICSNS / CSRx - I_LOAD_ERR_SYS
06XSD200
10
Analog Integrated Circuit Device Data
Freescale Semiconductor